Why Choose Dyumnin for ASIC/FPGA?

Reference design

Proven designs, with complete s/w + h/w flow, in networking and SOC's that can be extended with customer IP's.

Open source Design automation tools and VIP's

cocobtb RAL generator, Interconnect Generator, CSR Register generator, cocotb VIP's

RTL Cores

DMA, I2C, xSPI(SPI/Quad SPI, Octal SPI, Hyperbus),

Networking and Serial Protocol IP's

Ethernet, PCIe cores

High frequency trading IP's

Protocol Parsers, Order book Packet filters, TCP/UDP Offload

Code generators

CSR, Interconnect.

Our ASIC/FPGA-Optimized IP Cores